reset cycle for 6800

[A68]

Dear all,

I am new to this 6800 stuff. I find it to be very interesting
particularly because it needs 2 clock signal.

I have plenty of question here, I hope you are kind enough to write
answers for me.

1.
when the reset circuit is in action. what would be the content of the
Address bus.

2.
I know that after reset, it will go to some sort of interrupt, which
address is hold in addresses FFFE & FFFF. so the content of
address=FFFE loaded to address register, then the content of
address=FFFF.
2a.
Is this action hardwired to the CPU, instead of using CPU normal logic
circuit.
2b.
Does this has anything to do with "phase 1" and "phase 2" of the clock
signal.
2c.
Regarding "phase 1" and "phase 2", is it possible to have "phase 1"
twice longer than "phase 2".

3.
What is the requirement for providing "phase 1" and "phase 2" if I
don't have the proper clock chip such as 6875.

4.
How does 6800 store text file to floppy disk.

5.
What is "Halt and Catch Fire"


Thank you and have a nice day

A68

[james]

+<Dear all,
+<
+<I am new to this 6800 stuff. I find it to be very interesting
+<particularly because it needs 2 clock signal.
+<
+<I have plenty of question here, I hope you are kind enough to write
+<answers for me.
+<
+<1.
+<when the reset circuit is in action. what would be the content of the
+<Address bus.
+<

During RESET handling the address buss is tristated until the PC is
loaded with the RESET vector address.

+<2.
+<I know that after reset, it will go to some sort of interrupt, which
+<address is hold in addresses FFFE & FFFF. so the content of
+<address=FFFE loaded to address register, then the content of
+<address=FFFF.

One of the last things that the RESET logic does is load the PC with
the address found at the RESET vector address (FFFE/FFFF)

+<2a.
+<Is this action hardwired to the CPU, instead of using CPU normal logic
+<circuit.

The address FFFE/FFFF are hard coded.

+<2b.
+<Does this has anything to do with "phase 1" and "phase 2" of the clock
+<signal.

No. The 6800 and also the 6809 use a two phase clock system. The
second phase is predominantly to control internal logic function.

+<2c.
+<Regarding "phase 1" and "phase 2", is it possible to have "phase 1"
+<twice longer than "phase 2".
+<

No.

+<3.
+<What is the requirement for providing "phase 1" and "phase 2" if I
+<don't have the proper clock chip such as 6875.
+<

A 6875 is prefered but any logic combination can be used to generate
the two phases.

+<4.
+<How does 6800 store text file to floppy disk.
+<

Through a Floppy Disk controller IC that is memory mapped.

+<5.
+<What is "Halt and Catch Fire"
+<

The internals of the 6800 is all discrete logic. All the instruction
are not microcoded but are a combination of product terms which yield
sequential and/or combinatorial logic. The 6800 does not have a trap
vector so if the programmers injects an illegal opcode, there is a
potential for irradic operation. There has long been rumored that a
certain sequence of illegal opcodes could generate the "halt and Catch
Fire" sequence. I do not know that sequence or whether it is true or
not.

[Chris Croughton]

On 28 Mar 2006 06:36:29 -0800, A68

Post by A68
I am new to this 6800 stuff. I find it to be very interesting
particularly because it needs 2 clock signal.

The 6800 does indeed have a double clock signal, which makes things not
so simple, especially as memory accesses are only on one part of the
cycle.

Post by A68
I have plenty of question here, I hope you are kind enough to write
answers for me.
1.
when the reset circuit is in action. what would be the content of the
Address bus.

According to the specification, for the first 9 cycles the address bus
will be undefined, after that it will be $FFFE for as long as the RESET
line is held low, then in the following cycles it will do a read at
$FFFE and $FFFF. It isn't clear to me whether the address bus is
undefined for the first 9 cycles only on power up, but it is clear that
after 9 cycles it will have the defined value $FFFE.

The specification can be obtained (with a leading promotional page) from
http://www.datasheetarchive.com/search.php?search=MC6800&sType=part

Post by A68
2.
I know that after reset, it will go to some sort of interrupt, which
address is hold in addresses FFFE & FFFF. so the content of
address=FFFE loaded to address register, then the content of
address=FFFF.

Correct.

Post by A68
2a.
Is this action hardwired to the CPU, instead of using CPU normal logic
circuit.

It's in the CPU, not an external circuit.

Post by A68
2b.
Does this has anything to do with "phase 1" and "phase 2" of the clock
signal.

Not really, although as I recall the reset is only sampled on one phase
and the memory is only read on one phase.

Post by A68
2c.
Regarding "phase 1" and "phase 2", is it possible to have "phase 1"
twice longer than "phase 2".

As I recall, yes, as long as you don't exceed the maximum time for
either of the clocks or for the complete cycle (from memory, the latter
is 10 microseconds) either can be lengthened.

Post by A68
3.
What is the requirement for providing "phase 1" and "phase 2" if I
don't have the proper clock chip such as 6875.

See the specification. As I recall it's a little more complex than just
using an inverter because of the non-overlapping rule (the two clocks
mustn't both be high at the same time). The MC6875 datasheet has an
equivalent circuit (from which you could build in discrete TTL, but most
of it is used to do the memory hold-off for slow memory (lengthening the
phase until the memory is ready) and DMA, the basic circuit for constant
running is just a D-type flip-flop with feedback (!Q to D) and the two
phases being from Q and !Q.

The datasheet can be obtained from:
http://www.datasheetcatalog.com/datasheets_pdf/M/C/6/8/MC6875.shtml)

Post by A68
4.
How does 6800 store text file to floppy disk.

With a disk driver. Sorry, I don't have code for one (and it would
depend on the interface to the floppy and what file system you want to
use as well). But that is a lot higher level.

Post by A68
5.
What is "Halt and Catch Fire"

Heh. It's one of the undocumented instructions which can be found by
looking at the opcode table (in the official opcode table there are gaps
with no instructions stated), and causes the processor to stop, overheat
and in some cases actually melt or catch fire. As far as I know the
Motorola 6800 was the first processor for which the 'HCF' instructions
were described using that name, but it certainly wasn't the last...

Chris C

[jchausler]

Post by Chris Croughton
On 28 Mar 2006 06:36:29 -0800, A68

Post by A68
3.
What is the requirement for providing "phase 1" and "phase 2" if I
don't have the proper clock chip such as 6875.

See the specification. As I recall it's a little more complex than just
using an inverter because of the non-overlapping rule (the two clocks
mustn't both be high at the same time). The MC6875 datasheet has an
equivalent circuit (from which you could build in discrete TTL, but most
of it is used to do the memory hold-off for slow memory (lengthening the
phase until the memory is ready) and DMA, the basic circuit for constant
running is just a D-type flip-flop with feedback (!Q to D) and the two
phases being from Q and !Q.
http://www.datasheetcatalog.com/datasheets_pdf/M/C/6/8/MC6875.shtml)

IIRC the Motorola D1 kit used a dual one shot (8602?) but a funny.
MC3459 IIRC, chip to drive the inputs to the processor due to some
kind of loading problem. I doubt 3459's are available any more.

Post by Chris Croughton

Post by A68
4.
How does 6800 store text file to floppy disk.

With a disk driver. Sorry, I don't have code for one (and it would
depend on the interface to the floppy and what file system you want to
use as well). But that is a lot higher level.

There were several floppy operating systems for the 6800.
I used FLEX and there is a FLEX USERS GROUP on the net,
it was the most popular and there are versions for various hardware
configurations. Mine uses the popular 1771 floppy controller for
5 1/4 inch floppies in a PIO mode. The 6800 was not fast enough
to read 8 inch floppies in PIO mode so a DMA controller was
required. The 6809 could handle both in PIO mode. There were
versions of FLEX for both the 6800 and the 6809. There is still
a lot of activity in this area.

Midwest Scientific Instruments had MSI DOS is another one
out there with some continuing interest. Percom had a very
basic floppy disk system. I never used it but IIRC you had
to keep your own disk catalog.

Regards,
Chris

[Bill Janssen]

Post by jchausler

Post by Chris Croughton
On 28 Mar 2006 06:36:29 -0800, A68

Post by A68
3.
What is the requirement for providing "phase 1" and "phase 2" if I
don't have the proper clock chip such as 6875.

See the specification. As I recall it's a little more complex than just
using an inverter because of the non-overlapping rule (the two clocks
mustn't both be high at the same time). The MC6875 datasheet has an
equivalent circuit (from which you could build in discrete TTL, but most
of it is used to do the memory hold-off for slow memory (lengthening the
phase until the memory is ready) and DMA, the basic circuit for constant
running is just a D-type flip-flop with feedback (!Q to D) and the two
phases being from Q and !Q.
http://www.datasheetcatalog.com/datasheets_pdf/M/C/6/8/MC6875.shtml)

IIRC the Motorola D1 kit used a dual one shot (8602?) but a funny.
MC3459 IIRC, chip to drive the inputs to the processor due to some
kind of loading problem. I doubt 3459's are available any more.

As I remember the 6800 required clock voltage that was a little higher (
or lower ) than TTL
could provide.That was in addition to the timing constraints

Post by jchausler

Post by Chris Croughton

Post by A68
4.
How does 6800 store text file to floppy disk.

With a disk driver. Sorry, I don't have code for one (and it would
depend on the interface to the floppy and what file system you want to
use as well). But that is a lot higher level.

There were several floppy operating systems for the 6800.
I used FLEX and there is a FLEX USERS GROUP on the net,
it was the most popular and there are versions for various hardware
configurations. Mine uses the popular 1771 floppy controller for
5 1/4 inch floppies in a PIO mode. The 6800 was not fast enough
to read 8 inch floppies in PIO mode so a DMA controller was
required. The 6809 could handle both in PIO mode. There were
versions of FLEX for both the 6800 and the 6809. There is still
a lot of activity in this area.

I think the 2 MHz version (B) of the 6800 was fast enough for the 8 inch
or 3 1/2 inch drives

Post by jchausler
Midwest Scientific Instruments had MSI DOS is another one
out there with some continuing interest. Percom had a very
basic floppy disk system. I never used it but IIRC you had
to keep your own disk catalog.
Regards,
Chris

You should get on the FUG mailing list. There is an active (small)
group, many of
them were active in designing software and hardware for the Motorola chips.

Bill K7NOM

[David DiGiacomo]

Post by jchausler
IIRC the Motorola D1 kit used a dual one shot (8602?) but a funny.
MC3459 IIRC, chip to drive the inputs to the processor due to some
kind of loading problem. I doubt 3459's are available any more.

An ordinary 74HCT gate would make a good 6800 clock driver.